发明名称 Fault tolerant power sequencer
摘要 A system comprising a plurality of subsystems and a master power sequencer. Each of the plurality of subsystems is coupled to an associated power switch and an associated slave power sequencer. The master power sequencer is coupled to each of the slave power sequencers and each of the power switches. Upon a slave power sequencer identifying a fault with its associated subsystem, the master power sequencer determines whether to provide power to any other subsystem. Further, the master power sequencer is configured to send a signal to each of the power switches indicating whether to provide power to the subsystem associated with each of the power switches.
申请公布号 US8533528(B2) 申请公布日期 2013.09.10
申请号 US20090639801 申请日期 2009.12.16
申请人 MACIOROWSKI DAVID;HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 MACIOROWSKI DAVID
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址