发明名称 DESKEW SYSTEM FOR ELIMINATING SKEW BETWEEN DATA SIGNALS AND A CLOCK AND CIRCUITS FOR THE DESKEW SYSTEM
摘要 <p>A deskew system includes a first voltage control delay receiving a data signal and generating N-numbered delayed data signals obtained by delaying a phase of the data signal in units of 90/N, where N is a natural number that is not less than 1. In response to a phase control signal, a second voltage control delay receives a clock and generates N-numbered delayed clocks by delaying a phase of the clock in units of 90/N. A skew compensation control unit generates a plurality of skew control signals to compensate for skew between the data signal and the clock based on the data signal, the N-numbered delayed data signals, the clock, and the N-numbered delayed clocks.</p>
申请公布号 KR101448919(B1) 申请公布日期 2014.10.13
申请号 KR20070140117 申请日期 2007.12.28
申请人 发明人
分类号 H03K5/131 主分类号 H03K5/131
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