发明名称 INTEGRATOR OUTPUT SWING REDUCTION TECHNIQUE FOR SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
摘要 <p>PROBLEM TO BE SOLVED: To provide a sigma-delta (ΣΔ) analog-to-digital converter.SOLUTION: The present invention may include an apparatus and method to reduce an output swing in each stage of a multistage loop filter while also maintaining a desired signal transfer function for each respective stage. A given stage of the loop filter may include an integrator, a feedback path, a first cancellation path, and a second cancellation path. The first cancellation path may be coupled to the output of the integrator. The second cancellation path may be coupled to a feedback path provided about the input and output of the integrator. A first cancellation signal may be injected into the first cancellation path to reduce the output swing of the integrator. A second cancellation signal may be injected into the second cancellation path to minimize a change in the integrator's signal transfer function caused by the first cancellation signal.</p>
申请公布号 JP2015019367(A) 申请公布日期 2015.01.29
申请号 JP20140140161 申请日期 2014.07.08
申请人 ANALOG DEVICES INC 发明人 LI JIPENG
分类号 H03M3/02 主分类号 H03M3/02
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