| 摘要 |
<p>PROBLEM TO BE SOLVED: To significantly reduce the number of memories required, implement a small area while holding a similar function to existing LUTs, and reduce power consumption.SOLUTION: A programmable logic circuit with a programmable circuit configuration based on configuration data includes: a first programmable NAND gate circuit for outputting a normal or inverted version of input data, or a predetermined constant substituted; a multiplexer circuit for outputting one selected from a plurality of pieces of configuration data or from a plurality of pieces of configuration data selected from the former plurality of pieces of configuration data, on the basis of the output data from the first programmable NAND gate circuit; and a second programmable NAND gate circuit for outputting a normal or inverted version of the output data from the multiplexer circuit, or a predetermined constant substituted. A logic circuit representing an opposite one of two partial logic functions generated by expanding a logic function variable of which is the input data by Shannon's expansion is configured.</p> |
