发明名称 Method and apparatus for abutting p-cell layout based on position and orientation
摘要 An electronic design automation (EDA) tool generates first and second instances, which are different in at least one aspect, of a cell representing a device, allowing a user to initiate an abutment of the first and second instances in a layout canvas, reads a position and orientation of each of the first and second instances to be abutted from the layout canvas, evaluates the respective positions and orientations of the first and second instances, altering a component of one of the first and second instances based on the evaluation, and then automatically abuts the first and second instances following the alteration of the component of the one of the first and second instances.
申请公布号 US9213791(B1) 申请公布日期 2015.12.15
申请号 US201414334657 申请日期 2014.07.17
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 Yadav Amar K.;Iqbal Zameer;Prasad Dwarka
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人 Bergere Charles
主权项 1. A method of computer-aided design of an integrated circuit, the method comprising: generating, using an Electronic Design Automation (EDA) tool, a first instance and a second instance of a cell representing a device, the first and second instances being different in at least one aspect; allowing a user, using the EDA tool, to initiate an abutment of the first and second instances in a layout canvas; reading, by the EDA tool, a position and orientation of each of the first and second instances to be abutted from the layout canvas; evaluating, by the EDA tool, the respective positions and orientations of the first and second instances; altering, by the EDA tool, at least one component of at least one of the first and second instances based on the evaluation; and automatically abutting, by the EDA tool, the first and second instances following the alteration of the at least one component of the at least one of the first and second instances.
地址 Austin TX US