发明名称 MULTISTAGE MEMORY CELL READ
摘要 A multistage read can dynamically change word line capacitance as a function of threshold voltage of a memory cell being read. The multistage read can reduce current spikes and reduce the heating up of a memory cell during a read. A memory device includes a global word line driver to connect a word line of a selected memory cell to the sensing circuit, and a local word line driver local to the memory cell. After the word line is charged with read voltage, control logic can selectively enable and disable a portion or all of the global word line driver and the local word line driver in conjunction with applying different discrete voltage levels to the bit line to perform a multistage read.
申请公布号 KR20150139768(A) 申请公布日期 2015.12.14
申请号 KR20150061113 申请日期 2015.04.30
申请人 INTEL CORP. 发明人 GULIANI SANDEEP;PANGAL KIRAN;SRINIVASAN BALAJI;HU CHAOHONG
分类号 G11C16/26;G11C16/24;G11C16/28 主分类号 G11C16/26
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