发明名称 |
INTEGRATED CIRCUITS WITH VERTICAL JUNCTIONS BETWEEN nFETS AND pFETS, AND METHODS OF MANUFACTURING THE SAME |
摘要 |
Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming an implant mask overlying a dummy gate, where the implant mask produces a masked dummy gate and an exposed dummy gate. Ions are implanted into the exposed dummy gate, and the implant mask is removed. The masked dummy gate is etched with an etchant selective to the masked dummy gate over the exposed dummy gate to form a trench, and the trench is filled with a conductive material. |
申请公布号 |
US2015357433(A1) |
申请公布日期 |
2015.12.10 |
申请号 |
US201414299829 |
申请日期 |
2014.06.09 |
申请人 |
GLOBALFOUNDRIES, Inc. |
发明人 |
Moll Hans-Peter;Baars Peter |
分类号 |
H01L29/66;H01L27/092;H01L21/266 |
主分类号 |
H01L29/66 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method of producing an integrated circuit comprising:
forming an implant mask overlying a portion of a dummy gate to produce a masked dummy gate and an exposed dummy gate; implanting ions into the exposed dummy gate; removing the implant mask; etching the masked dummy gate with an etchant that selectively etches the masked dummy gate over the exposed dummy gate to form a trench; and filling the trench with a conductive material. |
地址 |
Grand Cayman KY |