High frequency switch circuit including gate bias resistances

摘要

N (n is an integer more than one) number of transistors are connected in series in an order from a first transistor to an nth transistor from a first terminal to a second terminal. First to nth nodes are connected to gates of the first to nth transistors. N number of resistance elements are connected in series in an order from a first resistance element to an nth resistance element from a bias terminal to the nth node. The first resistance element is connected between said bias terminal and said first node, and the kth resistance element (k=2 to n) is connected between the (k−1)th node and the kth node. Thus, a high frequency switch circuit can reduce an area of the whole gate bias resistances.

主权项

1. A high frequency switch circuit comprising:
a first terminal; a second terminal; a bias terminal; n (n is an integer more than one) number of transistors connected in series in an order from a first transistor to an nth transistor from said first terminal to said second terminal; first to nth nodes connected to gates of said first to nth transistors; and n number of resistance elements connected in series in an order from a first resistance element to an nth resistance element from said bias terminal to said nth node, wherein said first resistance element is connected between said bias terminal and said first node, wherein a kth resistance element (k=2 to n) is connected between said (k−1)th node and said kth node, and wherein a gate current value of a kth transistor is identical to a gate current value of a (k−1)th transistor.