发明名称 Capacitor and method of manufacturing capacitor
摘要 A capacitor includes: dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; first interlayer electrode and second interlayer electrode arranged alternately with each other between at least two layers among the dielectric layers; a first external electrode disposed on lateral surfaces of the dielectric layers and coupled to the first interlayer electrode; and a second external electrode disposed on lateral surfaces of the dielectric layers and coupled to the second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the first internal electrodes.
申请公布号 US9208951(B2) 申请公布日期 2015.12.08
申请号 US201414553488 申请日期 2014.11.25
申请人 FUJITSU LIMITED 发明人 Nakashima Tomokazu;Itoh Masayuki
分类号 H01L27/108;H01G4/30;H01G4/12;H01G4/008;H01G4/018 主分类号 H01L27/108
代理机构 Staas & Halsey LLP 代理人 Staas & Halsey LLP
主权项 1. A capacitor comprising: three or more dielectric layers including a first dielectric layer, a second dielectric layer, and at least one intermediate dielectric layer laminated between the first dielectric layer and the second dielectric layer; at least one first interlayer electrode and at least one second interlayer electrode which are arranged alternately with each other between at least two layers among the three or more dielectric layers; a first external electrode disposed on lateral surfaces of the three or more dielectric layers and coupled to the at least one first interlayer electrode; and a second external electrode disposed on lateral surfaces of the three or more dielectric layers and coupled to the at least one second interlayer electrode, wherein the intermediate dielectric layer includes first internal electrodes which are coupled to the first interlayer electrode, arranged in a plane direction of the intermediate dielectric layer and spaced apart from each other, and second internal electrodes which are coupled to the second interlayer electrode, arranged alternately with the first internal electrodes and spaced apart from the first internal electrodes.
地址 Kawasaki JP