发明名称 ARITHMETIC PROCESSING UNIT AND CONTROL METHOD FOR ARITHMETIC PROCESSING UNIT
摘要 PROBLEM TO BE SOLVED: To reduce memory access due to an unnecessary prefetch instruction.SOLUTION: An arithmetic processing unit includes: a decoding part for decoding an instruction; an instruction holding part in which the instruction related to memory access among the decoded instructions is registered; a hardware prefetch control part for executing prefetch at a predetermined opportunity different from a prefetch instruction to preliminarily transfer data stored in a memory to a cache memory; and a control part for determining whether or not an unnecessary prefetch instruction to transfer the data included in the data to be transferred to the cache memory by the hardware prefetch control part from the memory to the cache memory is registered in the instruction holding part, and for, when the unnecessary prefetch instruction is registered in the instruction holding part, invalidating the unnecessary prefetch instruction.
申请公布号 JP2015219550(A) 申请公布日期 2015.12.07
申请号 JP20140100210 申请日期 2014.05.14
申请人 FUJITSU LTD 发明人 KIMURA SHIGERU
分类号 G06F12/08 主分类号 G06F12/08
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