ASYMMETRIC STRESSOR DRAM

摘要

A stressor structure is formed within a drain region of an access transistor in a dynamic random access memory (DRAM) cell in a semiconductor-on-insulator (SOI) substrate without forming any stressor structure in a source region of the DRAM cell. The stressor structure induces a stress gradient within the body region of the access transistor, which induces a greater leakage current at the body-drain junction than at the body-source junction. The body potential of the access transistor has a stronger coupling to the drain voltage than to the source voltage. The asymmetric stressor enables low leakage current for the body region during charge storage while the drain voltage is low, and enables a body potential coupled to the drain region and a lower threshold voltage for the access transistor during read and write operations.

主权项

1. A semiconductor structure comprising:
a trench capacitor embedded within a semiconductor substrate; an access field effect transistor including a source region and a drain region, wherein said source region is electrically shorted to an inner electrode of said trench capacitor; and a stressor structure embedded within said drain region, said stressor structure generating asymmetric stress across a body region of said access field effect transistor.