发明名称 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC DEVICE
摘要 Threshold voltage adjustment method of a semiconductor device is provided. In a semiconductor device in which at least one of transistors included in an inverter includes a semiconductor, a source electrode or a drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer provided between the gate electrode and the semiconductor, the potential of the gate electrode of the transistor that is higher than those of the source electrode and the drain electrode is held for a short time of 5 s or shorter, whereby electrons are trapped in the charge trap layer and the threshold voltage is increased. At this time, when the potential differences between the gate electrode and the source electrode, and the gate electrode and the drain electrode are different from each other, the threshold voltage of the transistor of the semiconductor device becomes appropriate.
申请公布号 US2015349130(A1) 申请公布日期 2015.12.03
申请号 US201514723624 申请日期 2015.05.28
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 TANEMURA Kazuki;TANAKA Tetsuhiro;NODA Kosei
分类号 H01L29/786;H01L29/51;H01L29/792;H01L27/12;H01L27/088 主分类号 H01L29/786
代理机构 代理人
主权项 1. A semiconductor device comprising: a first transistor; and a second transistor, wherein the first transistor comprises: a first oxide semiconductor;a first electrode electrically connected to the first oxide semiconductor;a first gate electrode overlapping with the first oxide semiconductor; anda first charge trap layer between the first oxide semiconductor and the first gate electrode, wherein the second transistor comprises: a second oxide semiconductor;a second electrode electrically connected to the second oxide semiconductor and the first electrode;a second gate electrode overlapping with the second oxide semiconductor and electrically connected to the first electrode; anda second charge trap layer between the second oxide semiconductor and the second gate electrode, and wherein the number of electrons held in the first charge trap layer is larger than the number of electrons held in the second charge trap layer.
地址 Atsugi-shi JP