SEMICONDUCTOR MEMORY DEVICE WITH POWER INTERRUPTION DETECTION AND RESET CIRCUIT

摘要

A control logic unit generates a control signal which is activated while a power supply normally operates. A charge circuit is connected to a first node on a voltage control line supplied with a voltage generated by a voltage generation circuit, so that its capacitive element is charged with electric charge. A first discharge circuit is connected to a charge storage node of the charge circuit and discharges the stored electric charge when the control signal is activated. A second discharge circuit discharges the first node when the charge storage node has a potential exceeding a predetermined potential.

主权项

1. A semiconductor device comprising:
a plurality of memory cells each storing data depending on a change in level of a threshold voltage; a voltage generation circuit generating a voltage to be applied to said memory cell; a control logic unit generating a control signal activated while a power supply voltage is normally supplied; a charge circuit coupled to a first node on a voltage control line supplied with the voltage generated by said voltage generation circuit, said charge circuit including a second node and a capacitive element coupled to said second node; a first discharge circuit coupled to said second node, and coupling said second node to a ground potential when said control signal is activated; and a second discharge circuit coupling said first node to said ground potential when a voltage of said second node exceeds a threshold voltage value of said second discharge circuit.