发明名称 PHASE LOCKED LOOP(PLL) SYSTEM USING RECURSIVE LEAST SQUARE METHOD(RLSM)
摘要 The present invention relates to a phase locked loop (PLL) system using a recursive least square method (RLSM). The phase locked loop system of the present invention comprises: a first power signal conversion part which converts a three-phase alternating current power signal into a sine (sin) waveform signal and a cosine (cos) waveform signal; an RLSM part which estimates a phase error, an amplitude error, and an offset error to the first power signal by applying the recursive least square method in order for the first power signal of the first power signal conversion part to follow a signal of an ideal sine waveform and an ideal cosine waveform, and generates a compensated first power signal by compensating the first power signal based on the same; a second power signal conversion part which converts the compensated first power signal of the RLSM part into a second power signal of a phase angle and a voltage according to a synchronized coordinate system; and an SRF-PLL part which synchronizes an actual phase angle and a control phase angle by making the actual phase angle coincide with the control phase angle by adjusting the control phase angle to the second power signal of the synchronized coordinate system. According to the present invention, the PLL system performs a more accurate phase angle synchronization by applying a compensated power signal to the synchronous reference frame (SRF)-phase locked loop (PLL) by estimating the phase error, the amplitude error and the offset error by applying the recursive least square method to an abnormal power signal, and then compensating the power signal through the same.
申请公布号 KR20150132768(A) 申请公布日期 2015.11.26
申请号 KR20140059130 申请日期 2014.05.16
申请人 KOREA ELECTROTECHNOLOGY RESEARCH INSTITUTE 发明人 KIM, JI WON;MOON, SEOK HWAN;PARK, BYOUNG GUN;LEE, KI CHANG
分类号 H03L7/08;H03L7/14 主分类号 H03L7/08
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