MERGED GATE AND SOURCE/DRAIN CONTACTS IN A SEMICONDUCTOR DEVICE

摘要

Provided are approaches for forming merged gate and source/drain (S/D) contacts in a semiconductor device. Specifically, one approach provides a dielectric layer over a set of gate structures formed over a substrate; a set of source/drain (S/D) openings patterned in the dielectric layer between the gate structures; a fill material formed over the gate structures, including within the S/D openings; and a set of gate openings patterned over the gate structures, wherein a portion of the dielectric layer directly adjacent the fill material formed within one of the S/D openings is removed. The fill material is then removed, selective to the dielectric layer, and a metal material is deposited over the semiconductor device to form a set of gate contacts within the gate openings, and a set of S/D contacts within the S/D openings, wherein one of the gate contacts and one of the S/D contacts are merged.

主权项

1. A method of forming a semiconductor device, the method comprising:
providing a dielectric layer over a set of gate structures formed over a substrate; patterning a set of source/drain (S/D) openings in the dielectric layer between the set of gate structures; forming a fill material over the set of gate structures, including within the set of S/D openings; patterning a set of gate openings over the set of gate structures, wherein a portion of the dielectric layer directly adjacent the fill material formed within one of the set of S/D openings is removed; and removing the fill material selective to the dielectric layer.