发明名称 Method of Producing a III-V Fin Structure
摘要 A method of producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate is disclosed, the method comprising providing a semiconductor substrate, providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein said gap is bounded by said at least two identical STI structures, and, producing a III-V fin structure within said gap on the exposed semiconductor substrate, and providing a diffusion barrier at least in contact with each side wall of said at least two identical STI structures and with side walls of said III-V fin structure and wherein said semiconductor substrate is a Si substrate.
申请公布号 US2015340503(A1) 申请公布日期 2015.11.26
申请号 US201514719995 申请日期 2015.05.22
申请人 IMEC VZW ;Sony Corporation 发明人 Minari Hideki;Yoshida Shinichi;Pourtois Geoffrey;Caymax Matty;Simoen Eddy
分类号 H01L29/78;H01L29/06;H01L29/66;H01L21/3213;H01L21/285;H01L21/762;H01L21/3205;H01L29/20;H01L21/02 主分类号 H01L29/78
代理机构 代理人
主权项 1. A method for producing a III-V fin structure within a gap separating shallow trench isolation (STI) structures and exposing a semiconductor substrate, the method comprising: providing a semiconductor substrate; providing in the semiconductor substrate at least two identical STI structures separated by a gap exposing the semiconductor substrate, wherein the gap is bounded by the at least two identical STI structures, wherein the at least two STI structures are SiO2; producing a III-V fin structure within the gap on the exposed semiconductor substrate using a Metal Organic Vapor Phase Epitaxy (MOVPE) process; and providing a diffusion barrier at least in contact with each side wall of the at least two identical STI structures and with side walls of the III-V fin structure, and wherein the semiconductor substrate is a Si substrate.
地址 Leuven BE