发明名称 配線用セルフアライン(自己整合)バリア層
摘要 <p>An interconnect structure for integrated circuits incorporates manganese silicate and manganese silicon nitride layers that completely surrounds copper wires in integrated circuits and methods for making the same are provided. The manganese silicate forms a barrier against copper diffusing out of the wires, thereby protecting the insulator from premature breakdown, and protecting transistors from degradation by copper. The manganese silicate and manganese silicon nitride also promote strong adhesion between copper and insulators, thus preserving the mechanical integrity of the devices during manufacture and use. The strong adhesion at the copper-manganese silicate and manganese silicon nitride interfaces also protect against failure by electromigration of the copper during use of the devices. The manganese-containing sheath also protects the copper from corrosion by oxygen or water from its surroundings.</p>
申请公布号 JP5820267(B2) 申请公布日期 2015.11.24
申请号 JP20110500986 申请日期 2009.03.20
申请人 发明人
分类号 H01L21/3205;C23C16/42;H01L21/28;H01L21/285;H01L21/768;H01L23/532 主分类号 H01L21/3205
代理机构 代理人
主权项
地址