发明名称 High-voltage metal-oxide semiconductor transistor and method of fabricating the same
摘要 The present invention provides a high-voltage metal-oxide-semiconductor (HVMOS) transistor comprising a substrate, a gate dielectric layer, a gate electrode and a source and drain region. The gate dielectric layer is disposed on the substrate and includes a protruded portion and a recessed portion, wherein the protruded portion is disposed adjacent to two sides of the recessed portion and has a thickness greater than a thickness of the recessed portion. The gate electrode is disposed on the gate dielectric layer. Thus, the protruded portion of the gate dielectric layer can maintain a higher breakdown voltage, thereby keeping the current from leaking through the gate.
申请公布号 US9196695(B2) 申请公布日期 2015.11.24
申请号 US201414273538 申请日期 2014.05.08
申请人 UNITED MICROELECTRONICS CORP. 发明人 Yu Kun-Huang;Hsiao Shih-Yin;Lee Wen-Fang;Lin Shu-Wen;Chen Kuan-Chuan
分类号 H01L29/76;H01L29/423;H01L29/78;H01L29/66;H01L29/40;H01L29/08;H01L21/266;H01L21/28 主分类号 H01L29/76
代理机构 代理人 Hsu Winston;Margo Scott
主权项 1. A method of fabricating a HVMOS transistor, comprising: providing a substrate; forming a patterned shielding layer, covered on the substrate; performing an ion implantation by using the patterned shielding layer as a mask, to form a first doped region, and removing the patterned shielding layer; performing a thermal process to form a gate dielectric layer on the substrate, wherein the gate dielectric layer comprises a protruded portion and a recessed portion, the protruded portion is disposed at two sides of the recessed portion and comprises a thickness greater than a thickness of the recessed portion, and a border between the protruded portion and the recessed portion is vertically aligned with a side edge of the first doped region; forming a gate electrode on the gate dielectric layer; and forming a source and drain region embedded in the substrate at two sides of the gate electrode.
地址 Science-Based Industrial Park, Hsin-Chu TW