发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To suppress an SOA (Safe Operating Area) of a vertical bipolar transistor from becoming narrower.SOLUTION: A p-type base layer 150 includes a first peak, a second peak, and a third peak in a thickness direction in an impurity profile. The first peak is located on a most surface side of a semiconductor substrate 100. The second peak is located on a rear face side of the semiconductor substrate 100 than the first peak and higher than the first peak. The third peak is located between the first peak and the second peak.
申请公布号 JP2015207787(A) 申请公布日期 2015.11.19
申请号 JP20150135793 申请日期 2015.07.07
申请人 RENESAS ELECTRONICS CORP 发明人 FUKUI YUKI;KATO HIROO
分类号 H01L29/78;H01L21/265;H01L21/336;H01L27/088;H01L29/739 主分类号 H01L29/78
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