主权项 |
1. A method for manufacturing a semiconductor device having a vertical MOSFET with a super junction structure, comprising:
preparing a semiconductor substrate, in which a first semiconductor layer having a first conductivity type is formed on a surface of a substrate made of a semiconductor material; forming a step in the first semiconductor layer by forming a first concave portion that includes at least a part of a main region of the first semiconductor layer, the main region in which the vertical MOSFET is formed and used as a chip; forming a plurality of trenches by arranging a mask on the first semiconductor layer including an inside of the first concave portion, and etching the first semiconductor layer in the first concave portion of the main region using the mask; epitaxially growing a second semiconductor layer having a second conductivity type on the first semiconductor layer, and embedding the second semiconductor layer in each of the trenches and the first concave portion after removing at least a portion of the mask, which is formed in the first concave portion; forming a super junction structure having PN columns, in which a second conductivity type column provided by the second semiconductor layer left in each of the trenches and a first conductivity type column provided by the first semiconductor layer, which are arranged between the plurality of trenches, are alternately repeated, by flattening and polishing the second semiconductor layer to leave the second semiconductor layer in each of the trenches and the first concave portion; and forming the vertical MOSFET by: forming a channel layer having the first conductivity type and a source region having the second conductivity type in contact with the channel layer on the super junction structure; forming a gate electrode over a surface of the channel layer through a gate insulating film; forming a source electrode electrically connected to the source region on a surface side of the semiconductor substrate; and forming a drain electrode connected to a rear surface of the substrate on a rear surface side of the semiconductor substrate. |