Discrete Three-Dimensional Memory Comprising Off-Die Address/Data Translator

摘要

The present invention discloses a discrete three-dimensional memory (3D-M). Its 3D-M arrays are located on at least one 3D-array die, while its address/data translator (A/D-translator) is located on a separate peripheral-circuit die. The A/D-translator converts at least an address and/or data between logical space and physical spaces for the 3D-array die. A single A/D-translator die can support multiple 3D-array dies.

主权项

1. A discrete three-dimensional memory (3D-M), comprising:
a 3D-array die comprising at least a 3D-M array including a plurality of vertically stacked memory cells; a peripheral-circuit die comprising at least a portion of an address/data translator for converting at least an address and/or data between logical and physical spaces for said 3D-array die, wherein said portion of said address/data translator is absent from said 3D-array die; wherein said peripheral-circuit die comprises fewer back-end layers than said 3D-array die; and, said 3D-array die and said peripheral-circuit die are separate dice.