发明名称 METHODS OF FABRICATING INTEGRATED CIRCUITS
摘要 Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, a method is provided for fabricating an integrated circuit. The method includes forming a first FET trench in a first FET region and a second FET trench in a second FET region of an interlayer dielectric material on a semiconductor substrate, at least partially filling the first and second FET trenches with a work function metal to form a work function metal layer, and at least partially removing a portion of the work function metal layer in the second FET trench. The first FET trench is defined as an NFET trench and the second FET trench is defined as a PFET trench.
申请公布号 US2015325681(A1) 申请公布日期 2015.11.12
申请号 US201414270824 申请日期 2014.05.06
申请人 GLOBALFOUNDRIES, Inc. 发明人 Lee Bongki;Liu Jin Ping;Krishnan Bharat
分类号 H01L29/66 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method for fabricating an integrated circuit, the method comprising: forming a first FET trench in a first FET region and a second FET trench in a second FET region of an interlayer dielectric material on a semiconductor substrate; at least partially filling the first and second FET trenches with a work function metal to form a work function metal layer; and at least partially removing a portion of the work function metal layer in the second FET trench wherein the first FET trench is defined as an NFET trench and the second FET trench is defined as a PFET trench.
地址 Grand Cayman KY