发明名称 |
Devices and methods for calibrating and operating a snapback clamp circuit |
摘要 |
A device includes a snapback clamp circuit configured to clamp a supply voltage in response to the supply voltage exceeding a trigger voltage level. In at least one embodiment, the snapback clamp circuit includes a clamp transistor and a programmable resistance portion that is responsive to a control signal to calibrate the trigger voltage level. Alternatively or in addition, the snapback clamp circuit may include a programmable bias device configured to calibrate the trigger voltage level by biasing a gate terminal of the clamp transistor. In another particular embodiment, a method of calibrating a snapback clamp circuit is disclosed. In another particular embodiment, a method of operating an integrated circuit is disclosed. |
申请公布号 |
US9182767(B2) |
申请公布日期 |
2015.11.10 |
申请号 |
US201313794268 |
申请日期 |
2013.03.11 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
Srivastava Ankit;Sienko Matthew David;Worley Eugene Robert |
分类号 |
H02H9/00;G05F1/10;H01L27/02;H01L27/06;H02H9/04;H02H3/00 |
主分类号 |
H02H9/00 |
代理机构 |
Patterson & Sheridan, LLP |
代理人 |
Patterson & Sheridan, LLP |
主权项 |
1. A device comprising:
a snapback clamp circuit configured to clamp a supply voltage in response to the supply voltage exceeding a trigger voltage level, wherein the snapback clamp circuit includes a clamp transistor and a programmable resistance portion configured to adjust a body-to-ground resistance of the clamp transistor and responsive to a control signal to calibrate the trigger voltage level. |
地址 |
San Diego CA US |