发明名称 半導体装置
摘要 An object is to provide a transistor having a novel electrode structure capable of substantially maintaining on-state current while parasitic capacitance generated in an overlap portion between a source electrode layer (a drain electrode layer) and a gate electrode layer is reduced. Parasitic capacitance is reduced by using a source electrode layer and a drain electrode in a comb shape in a transistor. Curved current flowing from side edges of electrode tooth portions can be generated by controlling the width of an end of a comb-shaped electrode layer or the interval between the electrode tooth portions. This curved current compensates for a decrease in linear current due to a comb electrode shape; thus, on-state current can be kept unchanged even when parasitic capacitance is reduced.
申请公布号 JP5806834(B2) 申请公布日期 2015.11.10
申请号 JP20110085473 申请日期 2011.04.07
申请人 株式会社半導体エネルギー研究所 发明人 三宅 博之;鹿山 昌代
分类号 H01L29/786;H01L29/41;H01L29/417 主分类号 H01L29/786
代理机构 代理人
主权项
地址
您可能感兴趣的专利