发明名称 Microcomputer runaway monitoring device
摘要 The invention provides a control device for mutually monitoring two microcomputers at a low cost while reducing a parts number and doubly monitoring abnormality in each of the microcomputers. The control device transmits a reset signal to a main microcomputer and resets the main microcomputer when a frequency of a first pulse signal deviates from a normal frequency range determined by a frequency calculating means, in which the first pulse signal is output from the main microcomputer, and the frequency calculating means calculates a frequency of the first pulse signal by an input of the first pulse signal to a sub microcomputer. The control device transmits a reset signal to the sub microcomputer and resets the sub microcomputer when a frequency of a second pulse signal deflects from a normal frequency range, by an input of the second pulse signal to the main microcomputer from the sub microcomputer.
申请公布号 US9183098(B2) 申请公布日期 2015.11.10
申请号 US201314080048 申请日期 2013.11.14
申请人 Nikki Co., Ltd. 发明人 Abdukadir Mamat;Ando Yoshiyuki;Sawut Umerujan
分类号 G06F11/00;G06F11/16;G06F11/07 主分类号 G06F11/00
代理机构 代理人 Sudol R. Neil;Coleman Henry D.
主权项 1. A microcomputer runaway monitoring device comprising: a main microcomputer which is operated in a first operation cycle on the basis of a clock signal output from a first oscillating circuit; and a sub microcomputer which is operated in a second operation cycle on the basis of a clock signal output from a second oscillating circuit, wherein the microcomputer runaway monitoring device actuates the main microcomputer and the sub microcomputer in parallel, carries out a predetermined clocking processing by said main microcomputer and said sub microcomputer, transmits a reset signal to said main microcomputer via a first intermediate control circuit so as to reset the main microcomputer in the case that a frequency of a first pulse signal deviates from a frequency range which can be determined to be normal by a frequency calculating means, the first pulse signal being output from the clocking processing on the basis of said first operation cycle included in said main microcomputer and having a predetermined frequency, the frequency calculating means calculating the frequency of said first pulse signal by an input of the first pulse signal to the sub microcomputer, and transmits a reset signal to said sub microcomputer via a second intermediate control circuit so as to reset the sub microcomputer in the case that a frequency of a second pulse signal deviates from a frequency range which can be determined to be normal by a frequency calculating means, the second pulse signal being output from the clocking processing on the basis of said second operation cycle included in said sub microcomputer and having a predetermined frequency, the frequency calculating means calculating the frequency of said second pulse signal by an input of the second pulse signal to the main microcomputer.
地址 Atsugi, Kanagawa JP