| 发明名称 |
SYSTEM AND DEVICE FOR VERIFYING THE INTEGRITY OF A SYSTEM FROM ITS SUBCOMPONENTS |
| 摘要 |
A system and device for verifying the integrity of a system from its components, the system comprising a plurality of components each having a physical state, the system and the device comprising a processor that is connected to each of the components, the processor configured to verify systemic integrity by performing verification on some or all specified components. The verification may be individual (1, 1) or threshold (n, 1), and may be interactive or non-interactive. |
| 申请公布号 |
US2015317481(A1) |
申请公布日期 |
2015.11.05 |
| 申请号 |
US201514746090 |
申请日期 |
2015.06.22 |
| 申请人 |
Sypris Electronics, LLC |
发明人 |
Gardner Douglas J.;Walsh John J.;Wallrabenstein John Ross |
| 分类号 |
G06F21/57;H04L9/32 |
主分类号 |
G06F21/57 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A device for verifying the integrity of a system comprising a plurality of components each having a physical state and a physical unclonable function (‘PUF’) including a PUF input and a PUF output and constructed to generate, in response to the input of a specific challenge, an output value that is characteristic to
i) the PUF, ii) the component's physical state, and iii) the specific challenge; the device comprising a memory, and a processor connected to each of the components and configured to verify systemic integrity by performing verification on all or some specified components. |
| 地址 |
Tampa FL US |
