发明名称 |
Semiconductor device |
摘要 |
Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform. |
申请公布号 |
US9177613(B2) |
申请公布日期 |
2015.11.03 |
申请号 |
US201314018885 |
申请日期 |
2013.09.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
Lee Wookhyoung;Chun Jongsik;Shim Sunil;Ahn Jaeyoung;Lee Juyul;Hwang Kihyun;Kim Hansoo;Lee Woonkyung;Jang Jaehoon;Cho Wonseok |
分类号 |
G11C5/06;G11C7/00;H01L23/48;G11C7/18;H01L27/115;H01L27/02 |
主分类号 |
G11C5/06 |
代理机构 |
Sughrue Mion, PLLC |
代理人 |
Sughrue Mion, PLLC |
主权项 |
1. A semiconductor memory device comprising:
a plurality of horizontal electrodes; a plurality of insulating patterns alternatingly stacked with the plurality of horizontal electrodes; and an array of pillars formed in the plurality of insulating patterns and the plurality of horizontal electrodes, the array of pillars comprising:
a first group of pillars disposed along a first direction; anda second group of pillars disposed along a second direction parallel to the first direction, and staggered with respect to the first group of pillars, wherein a first pillar of the first group of pillars is disposed to one side of a second pillar of the first group of pillars and a third pillar of the first group of pillars is disposed to another side of the second pillar of the first group of pillars, and wherein the second pillar of the first group of pillars is closer to the third pillar of the first group of pillars than to the first pillar of the first group of pillars. |
地址 |
Suwon-si KR |