Wide range core supply compatible level shifter circuit

摘要

A level shifter circuit is implemented with dual gate fully depleted silicon-on-insulator (FDSOI) technology. By enhancing the performance of the NMOS and devices within the level shifting circuit, the Vt of the dual gate FDSOI NMOS transistors is lowered without a need for additional control circuitry. Lowering the Vt can be accomplished through dynamic secondary gate control, by coupling together primary and secondary gates of the NMOS devices, while secondary gates of the PMOS devices can be coupled to a high voltage supply level. Such high performance NMOS devices can then operate at higher frequencies and run on a much wider range of core power supplies. Meanwhile, conventional DC conditions are maintained during steady state operation. Because no components are added to the level shifter circuit, the higher performance is achieved without an increase in size and current consumption.

主权项

1. A circuit, comprising:
first and second p-channel fully depleted silicon on insulator (FDSOI) devices electrically cross-coupled to one another through an inverter to form a level shifter that shifts a low supply voltage to a high supply voltage, each p-channel FDSOI device including a primary gate and a secondary gate, the secondary gates of the p-FDSOI device being coupled to the high supply voltage; first and second dual-gate n-channel FDSOI devices, each dual-gate n-channel FDSOI device including a primary gate and a secondary gate, the primary and secondary gates of each n-channel FDSOI device being electrically coupled to one another, and each n-channel device coupled to a corresponding one of the p-channel devices; and an inverter having an input and an inverted output, the input electrically coupled to the primary and the secondary gates of the first n-channel device, and the inverted output electrically coupled to the primary and the secondary gates of the second n-channel device.