| 主权项 |
1. A circuit arrangement, comprising:
a plurality of differential amplifiers, coupled in parallel, including at least a first differential amplifier and a second differential amplifier; for each differential amplifier, a respective adjustable current control circuit coupled to the differential amplifier to limit a tail current passing through the differential amplifier, the adjustable current control circuit being configured to operate in one state of a discrete set of states including fully-on, fully-off, and partially-on, wherein operation of the adjustable current control circuit in the partially-on state causes the differential amplifier to exhibit non-linearity; and a gain control circuit coupled to the adjustable current control circuits, the gain control circuit configured to adjust, while the adjustable current control circuits for two or more of the plurality of differential amplifiers are operated in respective states other than the fully-off state, the adjustable current control circuits such that only one of the plurality of respective current control circuits can be operated in the partially-on state at a given time, thereby limiting non-linearity exhibited by the plurality of differential amplifiers. |
