发明名称 Semiconductor device having non-volatile memory with data erase scheme
摘要 In a nonvolatile memory device (4) provided in a semiconductor device, when data is erased based on a band-to-band tunneling scheme, supply of a boosted voltage to a memory cell (MC) to be erased is ended when a condition that an output voltage (VUCP) of a charge pump circuit (52) has recovered to a predetermined reference voltage is satisfied and additionally a condition that a predetermined reference time has elapsed since start of supply of the boosted voltage (VUCP) to the memory cell (MC) to be erased is satisfied.
申请公布号 US9177657(B2) 申请公布日期 2015.11.03
申请号 US201214400500 申请日期 2012.08.29
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Ogawa Tomoya;Ito Takashi;Tomoeda Mitsuhiro
分类号 G11C16/04;G11C16/14;G11C16/06;G11C16/32 主分类号 G11C16/04
代理机构 McDermott Will & Emery LLP 代理人 McDermott Will & Emery LLP
主权项 1. A semiconductor device comprising: a memory cell transistor having a charge storage portion and storing data based on a change of a threshold voltage depending on an amount of charge in said charge storage portion; a voltage generation unit generating a boosted voltage to be supplied to one main electrode of said memory cell transistor in an erase operation based on a band-to-band tunneling scheme; a detection unit detecting an output voltage of said voltage generation unit and comparing the output voltage with a reference value; and a control unit controlling a timing at which said boosted voltage is supplied in said erase operation, said control unit ending supply of said boosted voltage when a predetermined first reference time has elapsed since start of supply of said boosted voltage and a result of detection and comparison by said detection unit indicates that said boosted voltage has become equal to or more than said reference value.
地址 Tokyo JP
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