发明名称 |
Digital signal processor having instruction set with one or more non-linear complex functions |
摘要 |
Methods and apparatus are provided for a digital signal processor having an instruction set with one or more non-linear complex functions. A method is provided for a processor. One or more non-linear complex software instructions are obtained from a program. The non-linear complex software instructions have at least one complex number as an input. One or more non-linear complex functions are applied from a predefined instruction set to the at least one complex number. An output is generated comprised of one complex number or two real numbers. A functional unit can implement the one or more non-linear complex functions. In one embodiment, a vector-based digital signal processor is disclosed that processes a complex vector comprised of a plurality of complex numbers. The processor can process the plurality of complex numbers in parallel. |
申请公布号 |
US9176735(B2) |
申请公布日期 |
2015.11.03 |
申请号 |
US200812324926 |
申请日期 |
2008.11.28 |
申请人 |
Intel Corporation |
发明人 |
Azadet Kameran;Chen Jian-Guo;Hijazi Samer;Williams Joseph |
分类号 |
G06F7/483;G06F9/30;G06F17/16 |
主分类号 |
G06F7/483 |
代理机构 |
Nicholson De Vos Webster & Elliott LLP |
代理人 |
Nicholson De Vos Webster & Elliott LLP |
主权项 |
1. A method performed by a vector-based processor, comprising:
obtaining one or more non-linear complex software instructions having at least one complex input vector, wherein said one or more non-linear complex software instructions implement one or more corresponding non-linear complex functions and wherein said at least one complex input vector comprises one or more of real and complex components; and in response to a predefined software instruction keyword for at least one of said one or more non-linear complex software instructions, performing the following steps for each component of said at least one complex input vector, wherein said at least one complex input vector comprises a plurality of complex numbers and wherein said vector-based processor processes said plurality of complex numbers substantially simultaneously, wherein said predefined software instruction keyword for said at least one non-linear complex software instruction is part of an instruction set of said vector-based processor: invoking at least one hardware non-linear functional unit that implements said one or more non-linear complex software instructions to apply one of the one or more corresponding non-linear complex functions to each component of said at least one complex input vector to generate a corresponding complex-valued component of an output vector. |
地址 |
Santa Clara CA US |