| 摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the circuit scale of a correction circuit performing gain error correction, in aΔΣA/D converter.SOLUTION: AΔΣA/D converter 10 includes aΔΣmodulator 14 outputting bit data of a first predetermined number of bits obtained by performingΔΣmodulation of an analog input signal, for each sampling, a correction circuit 16 performing gain error correction with correction data of a second predetermined number of bits, for the bit data outputted from theΔΣmodulator, and a filter 18 outputting data of third predetermined number of bits, larger than the first predetermined number of bits, as the A/D conversion output, by filtering the data of second predetermined number of bits, outputted from the correction circuit.</p> |
