发明名称 |
SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING SAME |
摘要 |
A semiconductor light-emitting device of the invention includes: a semiconductor layer including a light-emitting layer and having a first major surface and a second major surface opposite to the first major surface; a phosphor layer facing to the first major surface; an interconnect layer provided on the second major surface side and including a conductor and an insulator; and a light-blocking member provided on a side surface of the semiconductor layer and being opaque to light emitted from the light-emitting layer. |
申请公布号 |
US2015295136(A1) |
申请公布日期 |
2015.10.15 |
申请号 |
US201514751780 |
申请日期 |
2015.06.26 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Sugizaki Yoshiaki;Kojima Akihiro;Obata Susumu |
分类号 |
H01L33/38;H01L33/40;H01L33/52;H01L33/50 |
主分类号 |
H01L33/38 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor light-emitting device comprising:
a semiconductor layer having a first major surface and a second major surface opposite to the first major surface, the semiconductor layer including a light-emitting layer, and the semiconductor layer not including a substrate on the first major surface side; an n-side electrode and a p-side electrode provided on the second major surface of the semiconductor layer; an insulating film having a first opening and a second opening, the first opening reaching the n-side electrode, the second opening reaching the p-side electrode; an n-side interconnect connected to the n-side electrode; a p-side interconnect connected to the p-side electrode; an n-side pillar connected to the n-side interconnect and having an end portion being available to connect external; a p-side pillar connected to the p-side interconnect and having an end portion being available to connect external; a resin provided between the n-side pillar and the p-side pillar, the resin supporting the semiconductor layer together with the n-side pillar and the p-side pillar; a metal film provided outside of a side surface continued from the first major surface of the semiconductor layer; and a phosphor layer provided on the first major surface side without a substrate being interposed between the first major surface and the phosphor layer, a portion of the n-side interconnect being electrically connected to the semiconductor layer at a portion not including the light-emitting layer, and another portion of the n-side interconnect extending toward the light-emitting layer side opposite to the light-emitting layer. |
地址 |
Tokyo JP |