发明名称 PATTERN BETWEEN PATTERN FOR LOW PROFILE SUBSTRATE
摘要 An integrated circuit (IC) substrate that includes a second patterned metal layer formed in between a first patterned metal layer is disclosed. A dielectric layer formed on the first patterned metal layer separates the two metal layers. A non-conductive layer is formed on the dielectric layer and the second patterned metal layer.
申请公布号 US2015294933(A1) 申请公布日期 2015.10.15
申请号 US201414253798 申请日期 2014.04.15
申请人 QUALCOMM Incorporated 发明人 We Hong Bok;Kim Chin-Kwan;Kim Dong Wook;Lee Jae Sik;Hwang Kyu-Pyung;Song Young Kyu
分类号 H01L23/528;H01L23/522;H01L21/768;H01L23/532 主分类号 H01L23/528
代理机构 代理人
主权项 1. An integrated circuit (IC) substrate, comprising: a first patterned metal layer formed on a substrate; a dielectric layer formed on the first patterned metal layer; a second patterned metal layer formed on the dielectric layer and in between the first patterned metal layer; and a non-conductive layer formed on the dielectric layer and the second patterned metal layer.
地址 San Diego CA US