Integrated circuit and display device including the same

摘要

An integrated circuit that includes a substrate, a semiconductor layer arranged on the substrate and an insulating layer arranged on an upper portion of the semiconductor layer and including a bump provided on an upper surface thereof, wherein the semiconductor layer includes a main semiconductor area and an including an internal alignment mark including a p-type semiconductor that is overlapped by a metallic external alignment mark arranged on the upper surface of the insulating layer. The p-type semiconductor internal alignment mark can be viewed by an infrared camera during a mounting process of the integrated circuit.

主权项

1. An integrated circuit, comprising:
a substrate; a semiconductor layer arranged on the substrate; an insulating layer arranged on an upper portion of the semiconductor layer; and a patterned metallic layer arranged on the insulating layer and on a top side of the integrated circuit, the patterned metallic layer including a plurality of bumps to output and receive signals to and from an outside and an external alignment mark visible from the top side of the integrated circuit, wherein the semiconductor layer includes a main semiconductor area and an alignment mark area spaced apart from the main semiconductor area, the alignment mark area includes an internal alignment mark, the internal alignment mark being a pattern visible by an infrared camera from a bottom and opposite side of the integrated circuit, wherein the pattern of the internal alignment mark corresponds to a doping pattern of the semiconductor layer and not an etching pattern of the semiconductor layer, the internal alignment mark being defined by one of a portion of the semiconductor layer within the alignment mark area that includes a p-type dopant or a portion of the semiconductor layer within the alignment mark area that is absent of a p-type dopant.