发明名称 SCALABLE, PARAMETERIZABLE, AND SCRIPT-GENERATABLE BUFFER MANAGER ARCHITECTURE
摘要 A buffer manager is generated by executing a script with respect to a buffer architecture template and a configuration file specifying parameters for the buffer such as, for example, number of memory banks, width of memory banks, depth of memory banks, and client bridge FIFO depth. The script converts the buffer architecture template into a hardware description language (HDL) description of a buffer manager having the parameters. Client bridges accumulate requests for memory banks in FIFO that is provided to a buffer manager upon the client bridge being granted arbitration. Accesses of memory banks may be performed one at a time in consecutive clock cycles in a pipelined manner. Client bridges and the buffer manager may operate in different clock domains. The clock frequency of the buffer manager may be increased or decreased according to requests from client devices.
申请公布号 US2015286590(A1) 申请公布日期 2015.10.08
申请号 US201514679527 申请日期 2015.04.06
申请人 Tidal Systems 发明人 Ou Michael;Wang Jerry;Lee Meng Kun
分类号 G06F13/16;G06F13/42 主分类号 G06F13/16
代理机构 代理人
主权项 1. A method for generating a buffer specification comprising: receiving, by a computer system, a buffer template defining a buffer manager architecture; receiving, by the computer system, a configuration file defining at least one of a number of memory banks, a memory bank width, a number of clients, and a client buffer depth; and executing, by the computer system, a script with respect to the buffer template and configuration file, the script outputting a hardware description language (HDL) file defining instructions for generating a buffer having the buffer manager architecture configured to have the at least one of the number of memory banks, the memory bank width, the number of clients, and the client buffer depth of the configuration file. outputting, by the computer system, the HDL file.
地址 Santa Clara CA US