发明名称 LAMINATED SEMICONDUCTOR DEVICE AND CIRCUIT PROTECTION METHOD
摘要 <p>PROBLEM TO BE SOLVED: To provide an immunity capability of an ESD even in a laminated semiconductor device including a plurality of power source groups by devising the arrangement of an ESD protection circuit to be moved to another chip.SOLUTION: A sub chip 20 placed in a main chip 10 includes a TSV 12 connecting an IO terminal 11 and an ESD protection circuit 21 to which an ESD current is inputted, and includes five power source groups connected in an annular shape and including a mounting circuit for mounting the ESD protection circuit 21 and a non-neighboring circuit which is not neighboring to the mounting circuit. A TSV 13 connects the non-mounting circuit and an IO terminal 14 included in the main chip 10, and the IO terminal 14 inputs the ESD current outputted from the ESD protection circuit 21 via bypass wiring 91a, a separation cell 9a and the TSV 13 and outputs the ESD current to the outside.</p>
申请公布号 JP2015179740(A) 申请公布日期 2015.10.08
申请号 JP20140056477 申请日期 2014.03.19
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAEZAKI HIROHIDE
分类号 H01L21/822;H01L21/82;H01L23/00;H01L25/065;H01L25/07;H01L25/18;H01L27/04 主分类号 H01L21/822
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