发明名称 Integrated decoupling capacitor utilizing through-silicon via
摘要 A semiconductor device may include a through substrate via (TSV) conductive structure that may extend vertically through two or more layers of the semiconductor device. The TSV conductive structure may be coupled to a first voltage supply. The semiconductor device may include substrate layer. The substrate layer may include a first dopant region and a second dopant region. The first dopant region may be coupled to a second voltage supply. The second dopant region may be in electrical communication with the TSV conductive structure. The semiconductor device may include a first metal layer and a first insulator layer disposed between the substrate layer and the first metal layer. The first metal layer may laterally contact the TSV conductive structure. The first and second voltage supply may be adapted to create a capacitance at a junction between the first dopant region and the second dopant region.
申请公布号 US9153638(B2) 申请公布日期 2015.10.06
申请号 US201313763823 申请日期 2013.02.11
申请人 International Business Machines Corporation 发明人 Behrends Derick G.;Christensen Todd A.;Hebig Travis R.;Launsbach Michael;Sheets, II John E.
分类号 H01L21/20;H01L49/02;H01L21/768;H01L29/94;H01L23/48 主分类号 H01L21/20
代理机构 代理人 Lowry Penny L.;Williams Robert
主权项 1. A method comprising: fabricating a semiconductor device having: a substrate layer including a first dopant region having a P− dopant type;a first metal layer disposed above the substrate layer; anda first insulator layer disposed between the substrate layer and the first metal layer, a lower surface of the first insulator layer adjacent to and in physical contact with an upper surface of the substrate layer, an upper surface of the first insulator layer adjacent to and in physical contact with a lower surface of the first metal layer; doping a portion of the first dopant region to form a second dopant region having an N+ dopant type having a concentration of at least 1020/cm3, the second dopant region separates a vertical etch from the first dopant region; depositing a conductive structure, vertically through the first metal layer, the first insulator layer, and the substrate layer, the conductive structure extending into the second dopant region, wherein a first diameter of the conductive structure in a plane of the first metal layer is smaller than a second diameter of the conductive structure in a plane of the first insulator layer, wherein the second dopant region abuts the conductive structure, wherein the second dopant region separates the conductive structure from the first dopant region, and wherein the first metal layer is in electrical contact with the conductive structure; and electrically coupling a first voltage supply with a first voltage to the conductive structure and a second voltage supply with a second voltage less than the first voltage to the first dopant region, wherein the first and second voltage supplies create a capacitance of a back biased diode junction at a depletion region between the first dopant region and the second dopant region, wherein the first dopant region acts as a first electrode, the second dopant region acts as a second electrode, and the depletion region acts as an insulator to create the capacitance.
地址 Armonk NY US
您可能感兴趣的专利