发明名称 Stretch Dummy Cell Insertion in FinFET Process
摘要 A method embodiment includes identifying, by a processor, an empty region in an integrated circuit (IC) layout, wherein the empty region is a region not including any active fins. The method further includes providing a standard dummy fin cell and forming an expanded dummy fin cell. The standard dummy fin cell includes a plurality of partitions. The expanded dummy fin cell is larger than the standard dummy fin cell, and the expanded dummy fin cell includes integer multiples of each of the plurality of partitions. The empty region is filled with a plurality of dummy fin cells, wherein the plurality of dummy fin cells includes the expanded dummy fin cell. The plurality of dummy fin cells is implemented in an IC.
申请公布号 US2015278420(A1) 申请公布日期 2015.10.01
申请号 US201514739108 申请日期 2015.06.15
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Ke Li-Sheng;Hsu Jia-Rong;Lin Hung-Lung;Yang Wen-Ju
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A method comprising: identifying, by a processor, an empty region in an integrated circuit (IC) layout, wherein the empty region is a region not including any active fins; providing a standard dummy fin cell, wherein the standard dummy fin cell comprises a plurality of partitions; forming an expanded dummy fin cell, wherein the expanded dummy fin cell is larger than the standard dummy fin cell, and wherein the expanded dummy fin cell comprises integer multiples of each of the plurality of partitions; filling the empty region with a plurality of dummy fin cells, wherein the plurality of dummy fin cells comprises the expanded dummy fin cell; and implementing the plurality of dummy fin cells in an IC.
地址 Hsin-Chu TW