发明名称 |
SUCCESSIVE COMPARISON TYPE ANALOG/DIGITAL CONVERTER, PHYSICAL QUANTITY SENSOR, ELECTRONIC DEVICE, MOVING OBJECT, AND SUCCESSIVE COMPARISON TYPE ANALOG/DIGITAL CONVERSION METHOD |
摘要 |
A successive approximation type AD converter includes a charge redistribution type DA conversion circuit, a comparator, and a control circuit. The charge redistribution type DA conversion circuit is configured such that each of k unit elements connects a switch and a unit capacitance in series and includes a unit capacitor array that is connected to a common output line in parallel and a selector that selects one voltage supplied to one input terminal, through m voltage supply lines, among at least three input terminals of switches included in j unit elements which are the targets for dynamic element matching (DEM) in k unit elements based on the DEM. |
申请公布号 |
US2015280730(A1) |
申请公布日期 |
2015.10.01 |
申请号 |
US201514666778 |
申请日期 |
2015.03.24 |
申请人 |
Seiko Epson Corporation |
发明人 |
TANAKA Atsushi;HANEDA Hideo |
分类号 |
H03M1/46;G01P15/125 |
主分类号 |
H03M1/46 |
代理机构 |
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代理人 |
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主权项 |
1. A successive approximation type AD converter comprising:
a charge redistribution type DA conversion circuit; a comparator that compares an output of the charge redistribution type DA conversion circuit voltage with a reference voltage; and a control circuit that controls the charge redistribution type DA conversion circuit based on the comparison results of the comparator, wherein the charge redistribution type DA conversion circuit includes:
a unit capacitor array in which respective k (k is an integer of 4 or greater) unit elements are configured by connecting a switch and a unit capacitance in series and the k unit elements connected to a common output line in parallel are two-dimensionally arranged; anda selector that selects one voltage supplied to one input terminal, through m (m is an integer of 2 to smaller than j) voltage supply lines, among at least three input terminals of the switch having j (j is an integer of 4 to k) unit elements that are the targets for dynamic element matching (DEM) in the k unit elements based on the DEM, the control circuit controls the selector and respective switches of the k unit elements based on the comparison results of the comparator, the selector selects an analog voltage to be converted which is to be supplied to the m voltage supply lines in common during a first period for which an analog voltage is sampled and held in the unit capacitor array, and the selector selects m weighted reference voltage as a voltage to be supplied to the m voltage supply lines during the second period for which the comparison is successively performed subsequent to the first period. |
地址 |
Tokyo JP |