| 摘要 |
The present invention relates to a semiconductor device. This semiconductor device has an n-type semiconductor region (12), an n-type source region (14), an n-type drain region (16), and a plurality of p-type embedded gate regions (18). Furthermore, the semiconductor device has a super junction structure (38). The super junction structure (38) is configured from: a plurality of p-type first regions (36p), each of which extends from each of the embedded gate regions (18) toward the drain region (16); and n-type second regions (36n) that are present among the first regions (36p). Furthermore, each of the embedded gate regions (18) has a configuration wherein each of the embedded gate regions is connected to an upper portion of each of the first regions (36p). |
