IMPLEMENTING ENHANCED RELIABILITY OF SYSTEMS UTILIZING DUAL PORT DRAM

摘要

A method, system and computer program product are provided for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. The DRAM configuration includes a first buffer and a second buffer, each buffer including a validity counter. The validity counter for a receiving buffer is incremented as each respective data row from a transferring buffer is validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, while the validity counter for the transferring buffer is decremented. Data are read from or written to either the first buffer or the second buffer based upon a respective count value of the validity counters.

主权项

1. A method for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration comprising:
configuring a first buffer and a second buffer of the dual port DRAM; providing a respective validity counter with each of the first buffer and the second buffer; incrementing a validity counter for a receiving buffer with each respective data row from a transferring buffer being validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, and decrementing the validity counter for the transferring buffer; and reading data from and writing data to one of the respective first buffer or second buffer based upon a respective count value of the respective validity counters.