| 摘要 |
<p>A method for manufacturing a semiconductor device having a recess gate is provided to improve an electrical characteristic and mutual interference by increasing a gap between an isolation layer and a recess pattern. A first recess pattern(204) of a vertical profile is formed on a substrate having an isolation layer(202). An isolation layer and an insulating layer having etch selectivity are formed on the substrate including the first recess pattern. A sidewall protection layer(205A) is formed on a sidewall of the first recess pattern by etching the insulating layer. A second recess pattern having a width wider than the width of the first recess pattern is formed by etching a bottom part of the first recess pattern. The insulating layer is an amorphous carbon layer and the isolation layer is an oxide layer.</p> |
