发明名称 System and method for generating object code for map-reduce idioms in multiprocessor system
摘要 Methods and systems are provided for recognizing and processing reduction operations to optimize generated binary code for execution in a multiprocessor computer system. Reduction operations facilitate data parallelism whereby each processing thread contributes a value and the values are reduced using a function to obtain and return a reduced value to each of the threads. Embodiments of an idiom-based interprocedural compiler provide a unified framework for processing both implicit and explicit reductions. The compiler integrates explicit reductions and implicit reductions by providing a uniform intermediate format. The compiler resolves dependencies among processing threads within program code by checking for privatization of dependent threads or parallelizing reduction idioms within the threads, and generates parallelized object code for execution in a multiprocessor computer.
申请公布号 EP1901165(A2) 申请公布日期 2008.03.19
申请号 EP20070253458 申请日期 2007.08.31
申请人 INTEL CORPORATION 发明人 LIAO, SHIH-WEI;CHEN, GUILIN;HUANG, BO
分类号 G06F9/45 主分类号 G06F9/45
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