发明名称 |
Wafer level testing for RFID tags |
摘要 |
Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
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申请公布号 |
US2006125507(A1) |
申请公布日期 |
2006.06.15 |
申请号 |
US20040014523 |
申请日期 |
2004.12.15 |
申请人 |
HYDE JOHN D;GLIDDEN ROBERT M;HORCH ANDREW E;KUHN JAY A;OLIVER RONALD A |
发明人 |
HYDE JOHN D.;GLIDDEN ROBERT M.;HORCH ANDREW E.;KUHN JAY A.;OLIVER RONALD A. |
分类号 |
G01R31/26 |
主分类号 |
G01R31/26 |
代理机构 |
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主权项 |
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地址 |
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