| 摘要 |
PURPOSE:To exactly discriminate whether an address code of each one block code which has been demodulated from a digital modulating signal is correct or wrong, by discriminating whether the address code is correct or wrong, based on a detection of existence of a synchronizing signal, a detection of a pattern error in a prescribed area having the address code, and a parity check. CONSTITUTION:Based on an output signal of the second synchronization detecting and holding means, and output signals of a pattern error detecting means and a parity checking means, a discrimination processing means formed by an AND gate 20 and a flip-flop 30 discriminates whether an address code of each block which has been demodulated is correct or wrong. In this case, only when an existence detecting signal is outputted from the second synchronization detecting and holding means, and also, an error detecting signal is not outputted from a pattern error detecting means, and the parity checking means, respectively, a correctness discriminating signal for showing a fact that the address code is correct is outputted. Also, by second synchronization detecting and holding means, the existence detecting signal is held for a processing period of two block codes of the block code which is being processed at present and the next block code.
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