发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To specify a defective module by connecting in series flip-flop circuit incorporated to plural modules via various routes to flow the test signal. CONSTITUTION:For instance, all modules are connected in series at first to flow the test signal and these modules are all decided nondefective as long as no abnormality is detected. If the abnormality is detected, the test signal is applied to the 1st module 1-1 only to check the state of this module. Then the module 1-1 is connected to a 2nd module 1-2 for flow of the test signal as long as no abnormality is detected. Hereafter the test is repeated while increasing those modules connected in series one by one. Thus the defective module is specified.
申请公布号 JPS63738(A) 申请公布日期 1988.01.05
申请号 JP19860145856 申请日期 1986.06.20
申请人 FUJITSU LTD 发明人 ABO KENICHI;MURATA TAKESHI;NODA TAKAHITO;KAMISAKA YUJI;TAKEI MASAYOSHI
分类号 G06F11/22 主分类号 G06F11/22
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