INTERFACE SYSTEM FOR DATA TRANSFER WITH REMOTE PERIPHERAL INDEPENDENTLY OF HOST PROCESSOR BACKPLANE

摘要

Logic interface circuitry for bypassing the standard backplane bus (40) of a host computer (30) permits the transmission of data between the host computer (30) and special purpose high-speed function add-in peripherals (60). The data is transmitted at the rate it is generated by the host computer (30) and the add-in peripheral (60).