发明名称 METHOD FOR FORMING METAL LINE IN SEMICONDUCTOR DEVICE
摘要 A method for forming metal line in semiconductor device is provided to decrease the electrostatic capacity between the interconnections by forming the interconnections at the side wall of the sacrifice insulating layer pattern. The first interlayer dielectric(101) is made of an insulating material. The contact hole formed within the first interlayer dielectric is formed as the hole type or the bar type. The barrier metal layer is formed between the contact plug(102) and the contact hole. The metal layer is formed with a lamination film consisting of the glue layer and the diffusion barrier of a single-layer film. The insulating layer for interconnection is formed at the upper part of the contact plug and the first interlayer dielectric. The barrier metal layer(104) is formed on the sacrifice insulating layer pattern(103A).
申请公布号 KR20090092940(A) 申请公布日期 2009.09.02
申请号 KR20080018201 申请日期 2008.02.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, HAN KYUM
分类号 H01L21/768 主分类号 H01L21/768
代理机构 代理人
主权项
地址