发明名称 Jitter correction
摘要 A system comprising includes a clock generator module, an analog-to-digital converter (ADC), and a correction module. The clock generator module receives a system clock and generates a digital clock that is derived from the system clock, wherein the digital clock has an average frequency. The clock generator module generates a deviation indication that indicates a deviation of the digital clock from an ideal clock of the average frequency. The ADC receives an analog signal, receives the digital clock, and generates a first stream of values by sampling the analog signal at intervals based on the digital clock. The correction module receives the first stream of values and generates a second stream of values that are corrected based on the deviation indication.
申请公布号 US7576666(B2) 申请公布日期 2009.08.18
申请号 US20070964311 申请日期 2007.12.26
申请人 MARVELL ISRAEL LTD. 发明人 MAYRENCH RONEN;PERETS YONI
分类号 H03M1/06 主分类号 H03M1/06
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